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Performance range： |
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Power supply: VDD：1.8V±0.1V Power supply |
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Bi-directional data strobe (DQS-DQS#) |
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Differential clock inputs (CK and CK#) |
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DLL aligns DQ and DQS transition with CK transition |
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Auto & self refresh capability (8192 Cycles / 64ms) |
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Double-data-rate architecture; two data transfers per clock cycle |
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Programmable Read latency : 3, 4 and 5 (clock) |
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Programmable Additive Latency: 0, 1, 2, 3 and 4 |
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Programmable Burst length：4 or 8 |
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Programmable Burst type (Sequential & Interleave) |
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Edge aligned data output, center aligned data input |
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Serial presence detect with EEPROM |