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Features: • VDD = 1.8V, VDDQ = 1.8V • I/O = SSTL_18 • 200 MHz and 266 MHz clock frequencies • 400 Mb/s/pin and 533 Mb/s/pin data rates • 3,200 MB/s and 4,300 MB/s for 64-bit systems • 4n data prefetch • 4 banks for 256Mb and 512Mb devices • 8 banks for 1Gb and 2Gb devices • Burst length of 4 or 8 • WRITE latency = READ latency - 1 clock • Differential data strobe option • Duplicate RDQS data strobe option • CAS latency: 3, 4, and 5 clocks • Posted CAS# additive latency: 0, 1, 2, 3, and 4 clocks • On-die termination (ODT) • Off-chip driver (OCD) output impedance calibration option • FBGA packaging |